Course 070 High-Speed PCB Design for EMC and Signal Integrity

Mr. Elya B. Joffe, Electromagnetic Solutions Ltd., Israel, is teaching this 5-day advanced design course for high-speed PCB’s covering theory and design for meeting EMC and Signal Integrity objectives. All EMI problems begin and end on the Printed Circuit Board. In recent years, PCBs have become increasingly complex. The use of high density VLSI on the one hand, combined with the increased processing speed and data rates on the other hand, have led to the increased density of the circuits. The use of high speed/high edge rate digital circuits, along with the need for low power consumption, have contributed to higher electromagnetic emissions from circuits, on the one hand, and increased sensitivity of the circuits on the other, leading to Electromagnetic Interference (EMI) problems. A special problem is that of Signal Integrity (SI). For the adequate control of EMI, strict international standards and regulations have been developed worldwide. These standards require the suppression of electromagnetic emissions from circuits and systems, and their increased immunity to externally induced interference. The proper design of PCBs is a cost effective approach for the control of EMI in high-speed circuits.

Available course dates

This course has no planned course dates.

If you are interested in this course, contact us at cei@cei.se

EMC, SI, PI.

070 High-Speed PCB Design for EMC and Signal Integrity

Location: Gothenburg, Sweden Date: June 22 - June 26, 2026 Duration: 5 days
Instructor: Mr. Elya B. Joffe. All EMI problems begin and end on the Printed Circuit Board. In recent years, PCBs have become increasingly complex. The use of high density VLSI on the one hand, combined with the increased processing speed and data rates on the other hand, have led to the increased density of the circuits. The use of high speed/high edge rate digital circuits, along with the need for low power consumption, have contributed to higher electromagnetic emissions from circuits, on the one hand, and increased sensitivity of the circuits on the other, leading to Electromagnetic Interference (EMI) problems. A special problem is that of Signal Integrity (SI). For the adequate control of EMI, strict international standards and regulations have been developed worldwide. These standards require the suppression of electromagnetic emissions from circuits and systems, and their increased immunity to externally induced interference. The proper design of PCBs is a cost effective approach for the control of EMI in high-speed circuits. Read full course description including course schedule.

Early Bird
3 540,00 3 935,00 
Early Bird Price Ends: April 22, 2026

TECHNOLOGY FOCUS

All EMI problems begin and end on the Printed Circuit Board. In recent years, PCBs have become increasingly complex. The use of high density VLSI on the one hand, combined with the increased processing speed and data rates on the other hand, have led to the increased density of the circuits. The use of high speed/high edge rate digital circuits, along with the need for low power consumption, have contributed to higher electromagnetic emissions from circuits, on the one hand, and increased sensitivity of the circuits on the other, leading to Electromagnetic Interference (EMI) problems.

A special problem is that of Signal Integrity (SI). For the adequate control of EMI, strict international standards and regulations have been developed worldwide. These standards require the suppression of electromagnetic emissions from circuits and systems, and their increased immunity to externally induced interference. The proper design of PCBs is a cost effective approach for the control of EMI in high-speed circuits.

Instructor

Mr. Elya B. Joffe

COURSE CONTENT

This is an advanced design course, dealing with the theory and design of PCBs for meeting EMC and SI objectives.

The course features understanding of the electromagnetic phenomena in PCBs, and in particular in high-speed digital PCBs.

The course emphasizes practical applications, with mathematical derivations kept to the minimum necessary.

In addition, case studies and practical “real life” examples will be provided.

WHO SHOULD ATTEND

The Course is intended for electrical, electronic and computer and process control engineers, who are involved in the design and development, qualification or engineering management of electronic and electrical equipment and systems for government, industrial, commercial, aviation and other applications. In particular – the Course is intended for Engineers involved in the design of power and communication systems, or equipment connected to such networks, thereby exposed to transients, e.g. lightning-induced surges and other sources.

Benefit to the Participants

Participants in the Course will

  • obtain fundamental knowledge of the electrical transient and overstress phenomena and their effects
  • gain knowledge on transient specifications and standards, and the application of the standards
  • learn how to estimate or derive the susceptibility levels of electrical and electronic circuits to transients and electrical overstress
  • study the characteristics of basic protection devices, and obtain the knowledge to design advanced topologies of protection circuits

In addition, participants are encouraged to bring forward actual design problems and questions they encountered, which the instructor will attempt to assist in their solution.

Day 1
Introduction – Why Design for EMC and SI?
We will discuss the concepts of EMC and SI and describe the similarities and differences between the two as they pertain to circuit design and the primary parameters that govern interference modes and system performance with respect to EMC and SI.

Noise Sources on PCBs
The characteristics of noise sources on PCBs will be discussed, with particular emphasis on noise in signal, power and ground circuits. Coupling and interaction between circuits, particularly crosstalk, will be discussed in detail.

Circuit Elements
Characteristics of real world circuit elements, with special emphasis on parasitic inductance, capacitance and resistance will be discussed.

Fundamentals of Grounding Design
The concept of grounding and basics of grounding system designs will be presented. Design of the grounding tree and identification and elimination of ground loops will be discussed in detail. Application of the fundamental grounding theory to grounding on PCBs will be presented.

Day 2
Power Circuit Designs on PCBs
A discussion of the interaction via the power system on the PCB will lead to the concept of decoupling, classical and innovative decoupling strategies, filtering, and filter design for EMI control. In particular, the generation of Parallel Plate Waveguide Noise will be discussed. Novel techniques for addressing “Ground Bounce” or delta-I Noise and its mitigation such as Electromagnetic Band Gap (EBG) will also be presented.

Reflections and Impedance Mismatch on High Speed Digital PCBs
We now focus on the treatment of signal traces, transmission lines, and the implication of the concept to PCB design. Impedance mismatch, leading to reflections and noise are discussed in detail, and design approaches, including impedance matching, source and load termination topologies are presented. The concept of “S-Parameters” for circuit analysis will be presented.

Day 3
Crosstalk on the PCB
The concept of crosstalk on PCB as a primary source of EMI concerns and failures is discussed. Approaches for minimizing crosstalk, with particular emphasis of routing guidelines, are presented in detail.

PCB Design for EMC
Strategies for a systematic design approach of PCBs from the standpoint of EMC and SI includes such design features as layout, layer stacking, placement, power distribution and grounding/reference systems.

Treatment of Mixed (Analog/Digital) Circuits
The problem of mixed analog/digital circuits is presented. The discussion covers the problem of ADC and DAC devices, and circuit design with one or multiple devices on one and on multiple PCBs.

Day 4
Clock Circuits
The special problems associated with clock circuits and clock signal distribution, including classical and novel approaches for clock circuit design, are discussed.

Treatment of Special Signals in PCB Design
Some commonly used digital interfaces, such as LVDS circuit design, are given particular attention.

Shielding on PCBs
Implementation of shielding as an EMI control measure, particularly on PCBs, is discussed here.

Edge Connectors
Improper design of edge connectors may cause an otherwise good design to fail both EMC and SI objectives. We will discuss the proper design of edge connectors consistent with circuit design with special emphasis on high-speed interfaces. Items covered include pin allocation, layout of power, ground pins, and the connector arrangement.

PCB Layout Guidelines
A verification checklist for PCB layout guidelines for EMC and SI will be presented.

Day 5
Measurement Fundamentals
EMC measurements, particularly the use of spectrum analysers and oscilloscopes for observing system performance, will be discussed.

Summary
Questions, examples presented by the participants, and practical EMC and SI problems on PCBs will be treated in an interactive manner.

ALL COURSE DATES FOR THE CATEGORY:

EMC, SI, PI.

054 Signal and Power Integrity: Advanced High-Speed Design and Characterization

Location: Barcelona, Spain Date: April 13-17, 2026 Duration: 5 days
Instructor: Dr. István Novák. With machine learning and artificial intelligence needs on the rise, the thousands of amperes currents on some of the power rails create unique challenges across our designs, manufacturing and validation. Properly designed power distribution is a key requirement to achieve good signal integrity and to avoid electro-magnetic interference problems. As companies are working towards data rates over 400 Gbps and main-stream serial signaling is in the 5-10 Gbps range; signal rise and fall times shrink to single digit picoseconds. As a result of these signal and power integrity trends, laminate and copper characteristics, glass-weave effects and surface roughness, frequency-dependent trace and component parameters, inter-symbol interference (ISI), jitter and finite bit-error-rate (BER) all need to be re-evaluated and reconsidered. With the increasing utilization of equalization and pre-emphasis, validations even with eye diagrams may not be sufficient. Today, equally challenging is the proper design of power distribution. A multitude of supply voltages, shrinking target impedance values approaching tens of microohms and higher channel attenuations come with reduced timing and noise margins. The allowed noise on signals and on supply rails decreases and the increasing density and bandwidth of interconnects inter-link the previously independent power-integrity, signal-integrity and EMC design domains. Also, the mere definition of impedance on a power rail with tens of microohms impedance becomes non-trivial. Read full course description including course schedule.

Early Bird
3 540,00 3 935,00 
Early Bird Price Ends: February 13, 2026

EMC, SI, PI.

060 Grounding and Shielding: The Essence of EMC Design

Location: Barcelona, Spain Date: April 13-16, 2026 Duration: 4 days
Instructor: Mr. Elya B. Joffe. Modern electronics are extremely vulnerable to electrical transients and overstress, which are “predictably unpredictable”. Protection measures can be designed and implemented, are available, but many businesses are not aware of the threat and/or not willing to invest the time or money: There is a prevailing “It Can’t Happen” attitude. This 4-day course will provide the engineering know-how, to describe transient protection and mitigation techniques and to provide the technical tools enabling the engineer to analyze the vulnerability of equipment and design protection of product, systems and facilities, to transients and electrical overstress in electronic circuits and installations, in order to meet the applicable standards and codes. Read full course description including course schedule.

Early Bird
2 940,00 3 265,00 
Early Bird Price Ends: February 13, 2026

EMC, SI, PI.

070 High-Speed PCB Design for EMC and Signal Integrity

Location: Gothenburg, Sweden Date: June 22 - June 26, 2026 Duration: 5 days
Instructor: Mr. Elya B. Joffe. All EMI problems begin and end on the Printed Circuit Board. In recent years, PCBs have become increasingly complex. The use of high density VLSI on the one hand, combined with the increased processing speed and data rates on the other hand, have led to the increased density of the circuits. The use of high speed/high edge rate digital circuits, along with the need for low power consumption, have contributed to higher electromagnetic emissions from circuits, on the one hand, and increased sensitivity of the circuits on the other, leading to Electromagnetic Interference (EMI) problems. A special problem is that of Signal Integrity (SI). For the adequate control of EMI, strict international standards and regulations have been developed worldwide. These standards require the suppression of electromagnetic emissions from circuits and systems, and their increased immunity to externally induced interference. The proper design of PCBs is a cost effective approach for the control of EMI in high-speed circuits. Read full course description including course schedule.

Early Bird
3 540,00 3 935,00 
Early Bird Price Ends: April 22, 2026

EMC, SI, PI.

071 Transients and Electrical Overstress Protection in Electronic Systems

Location: Amersfoort, The Netherlands Date: May 18 - May 20, 2026 Duration: 3 days
Instructor: Mr. Elya B. Joffe. Modern electronics are extremely vulnerable to electrical transients and overstress, which are “predictably unpredictable”. Protection measures can be designed and implemented, are available, but many businesses are not aware of the threat and/or not willing to invest the time or money: There is a prevailing “It Can’t Happen” attitude. This 3-day course will provide the engineering know-how, to describe transient protection and mitigation techniques and to provide the technical tools enabling the engineer to analyze the vulnerability of equipment and design protection of product, systems and facilities, to transients and electrical overstress in electronic circuits and installations, in order to meet the applicable standards and codes. Read full course description including course schedule.

Early Bird
2 280,00 2 535,00 
Early Bird Price Ends: March 18, 2026

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