Course 088 Plasma Etching for CMOS Technology and ULSI Applications

Dr. Maxime Darnon, at the Laboratoire Hubert Curien in Saint Etienne, France is teaching this 4-day course in Plasma Etching for CMOS Technology and ULSI Applications. This course is intended to provide an understanding of plasma processes for CMOS applications and ULSI technology. We will discuss fundamental and practical aspects of front end and back end plasmaprocesses for deep submicron CMOS logic processes. The course is based on experimental results obtained using commercial etchers connected to very powerful diagnostics of the plasma and the plasma surface interaction. The discussions cover several aspectsof etch processes of materials integrated in advanced CMOS devices,etch mechanisms, and situations that may be encountered for some important plasma processes. Option 2: Take the short Ecourse #089 Plasma Etching for Microelectronics Applications. Combining self-paced e-learning with live weekly sessions with the instructor. Duration in total is two weeks of effective learning. Content based on the first two days of the public course #088 Option 3: Take the full Ecourse #090 Plasma Etching for Microelectronics Applications: from Fundamental to Practical Applications. Combining self-paced e-learning with live weekly sessions with the instructor. Duration in total is four weeks of effective learning. Content based on complete agenda of the public course #088.

Available course dates

This course has no planned course dates.

If you are interested in this course, contact us at cei@cei.se

Semiconductors Technology

088 Plasma Etching for CMOS Technology and ULSI Applications

Location: Gothenburg, Sweden Date: June 22 - June 25, 2026 Duration: 4 days
Instructor: Dr. Maxime Darnon This course is intended to provide an understanding of plasma processes for CMOS applications and ULSI technology. We will discuss fundamental and practical aspects of front end and back end plasma processes for deep submicron CMOS logic processes. The course is based on experimental results obtained using commercial etchers connected to very powerful diagnostics of the plasma and the plasma surface interaction. The discussions cover several aspects of etch processes of materials integrated in advanced CMOS devices, etch mechanisms, and situations that may be encountered for some important plasma processes. Option 2: Take the short Ecourse #089 Plasma Etching for Microelectronics Applications. Combining self-paced e-learning with live weekly sessions with the instructor. Duration in total is two weeks of effective learning. Content based on the first two days of the public course #088. Option 3: Take the full Ecourse #090 Plasma Etching for Microelectronics Applications: from Fundamental to Practical Applications. Combining self-paced e-learning with live weekly sessions with the instructor. Duration in total is four weeks of effective learning. Content based on complete agenda of the public course #088. Read full course description including course schedule

Early Bird
2 940,00 3 265,00 
Early Bird Price Ends: April 22, 2026

TECHNOLOGY FOCUS

Extensive efforts to miniaturize semiconductor devices is largely attributed to lithography and etching technologies that allow semiconductor thin films patterning in the range of dimensions determined by the semiconductor road map.

During more than 30 years, classical materials, such as aluminum, SiO2, and polysilicon, have been integrated in semiconductor devices.
Nowadays, the technology imposes to work with new materials at each technological node. The integration of new high k and low k dielectric materials, metals at the front and back end of device fabrication, bring on new problem categories.

This imposes the necessity to quickly build up expertise at a rate unprecedented in all the history of semiconductor manufacturing.

Instructor

Dr. Maxime Darnon

COURSE CONTENT

This course is intended to provide an understanding of plasma processes for CMOS applications and ULSI technology. We will discuss fundamental and practical aspects of front end and back end plasma processes for deep submicron CMOS logic processes.

The course is based on experimental results obtained using commercial etchers connected to very powerful diagnostics of the plasma and the plasma surface interaction. The discussions cover several aspects of etch processes of materials integrated in advanced CMOS devices, etch mechanisms, and situations that may be encountered for some important plasma processes.

Fundamental parameters obtained from advanced characterizations are used to discuss and analyze plasma etch processes. The emphasis is on real problems, fundamental understanding of processes used in manufacturing, considerations for integration with other steps, and issues brought by the fast device scaling.

Processes covered in detail include silicon gate patterning and all the problems related to critical dimension control as well as results on metal gate and high k dielectric etching. The etch processes associated with the integration of low k materials will be extensively discussed.

WHO SHOULD ATTEND

Any person with a technical background wishing to obtain a better understanding of the mechanistic aspects of plasma-assisted etching, or of reactive gas plasma-surface interactions in general, should benefit from taking this course.

Although the emphasis of the course is on the ULSI circuit fabrication applications, much of the information presented should be of value in the implementation of other processes involving reactive gas plasmas.

A familiarity with the basic concepts of plasma-assisted etching would be helpful but is not essential as the course includes a short summary of the basics.

Day One

Plasma Fundamentals

  • Fundamentals of Cold Plasma Physics
  • Plasma Sources used for Etching Application
  • Plasma Surface Interactions Involved in Etching

Day Two

Etching Fundamentals

  • Pattern Transfer in Plasma Etching
  • Profile Control for Plasma Etching
  • Monitoring and Controlling a Plasma Etching Processes
Day Three

Plasma Etching for Front End Of Line application

  • Photoresist and Mask
  • Poly Silicon Gate Etching
  • Metal Gate / High-k Etching
  • Atomic Layer Etching
  • New Patterning Technologies
  • New Transistor Architectures

Day Four

Plasma Etching for Back End Of Line Application

  • Etching with a Fluorocarbon-Based Plasma
  • Spacers Etching
  • Contacts Etching
  • Dense SiOCH Etching for Interconnects
  • Porous SiOCH Etching for Interconnects
  • High Aspect Ratio Structures Etching

ALL COURSE DATES FOR THE CATEGORY:

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Instructor: Dr. Maxime Darnon This course is intended to provide an understanding of plasma processes for CMOS applications and ULSI technology. We will discuss fundamental and practical aspects of front end and back end plasma processes for deep submicron CMOS logic processes. The course is based on experimental results obtained using commercial etchers connected to very powerful diagnostics of the plasma and the plasma surface interaction. The discussions cover several aspects of etch processes of materials integrated in advanced CMOS devices, etch mechanisms, and situations that may be encountered for some important plasma processes. Option 2: Take the short Ecourse #089 Plasma Etching for Microelectronics Applications. Combining self-paced e-learning with live weekly sessions with the instructor. Duration in total is two weeks of effective learning. Content based on the first two days of the public course #088. Option 3: Take the full Ecourse #090 Plasma Etching for Microelectronics Applications: from Fundamental to Practical Applications. Combining self-paced e-learning with live weekly sessions with the instructor. Duration in total is four weeks of effective learning. Content based on complete agenda of the public course #088. Read full course description including course schedule

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